assign_registers_to_line_or_cycle

forest.benchmarking.classical_logic.assign_registers_to_line_or_cycle(start: int, graph: networkx.classes.graph.Graph, num_length: int) → Tuple[Sequence[int], Sequence[int], int, int]

From the start node assign registers as they are laid out in the ideal circuit diagram in [CDKM96].

Assumes that the there are no dead ends in the graph, and any available neighbor can be selected from the start without any further checks.

Parameters:

• start – a node in the graph from which to start the assignment
• graph – a graph with an unambiguous assignment from the start node, e.g. a cycle or line
• num_length – the length of the bitstring representation of one summand

Returns:

the necessary registers and ancilla labels for implementing an adder program to add the numbers a and b. The output can be passed directly to adder()